Fraunhofer Institute for Integrated Circuits IIS, Division Engineering of Adaptive SystemsEurope has set itself the clear objective of further strengthening its technological sovereignty in relation to semiconductors. One key part of this is the EU Chips Act – and that is precisely where our work at the Dresden site comes in.
In early March, we received a visit by high-ranking representatives of the European semiconductor initiative, including Eric Fribourg-Blanc, Senior Program Officer of the Chips Joint Undertaking, as well as representatives of the Research Fab Microelectronics Germany (FMD) and the Fraunhofer-Gesellschaft. Together with our team, we showed the concrete steps we are taking to put European technology policy into practice.
The visit centered around the APECS pilot line, which constitutes a European platform for testing new electronics and system technologies in real-world conditions. Here, the aim is to significantly shorten the path from research to industrial applications. This is an area where we leverage our core skills – from energy-efficient and reliable system and chip design to architecture development and testing and validation in the lab.
The presentation of our technology and services was followed by intensive discussions of the project’s strategic objectives, challenges, and priorities. A subsequent lab tour brought our work in Dresden to life for visitors and highlighted settings in which Europe’s semiconductor future is already being prepared.
One key topic of discussion was the concept of system technology co-optimization (STCO). This approach allows heterogeneous systems to be designed holistically while achieving optimum coordination of performance, costs, and other system KPIs.
The tour once again demonstrated the importance of close collaboration between research, industry, and European initiatives. Together, we are working to further align APECS with the needs of industry, to create specific services for partners, and to bolster Europe’s semiconductor expertise on a lasting basis.
We would like to thank all visitors for the valuable insights and fascinating exchange of ideas.
About APECS-Pilotlinie
Under the EU Chips Act, FMD will implement APECS, a comprehensive pilot line to support resilient and trusted heterogeneous systems over the coming years. The APECS pilot line will enhance the innovative capacity of European industries across various sectors and serve as a crucial foundation for Europe’s technological resilience. Through System Technology Co-Optimization (STCO), APECS introduces new functionalities and offers seamless design-to-production capabilities, facilitating the transition of research breakthroughs into scalable manufacturing solutions. As a single point of access, APECS serves stakeholders across nearly all industry sectors, including large enterprises, SMEs, and start-ups. This pilot line brings together the competences, infrastructure, and know-how of ten partners from eight European countries. In Germany twelve institutes from the Fraunhofer-Gesellschaft and two institutes from the Leibniz Association are participating in APECS. APECS is coordinated by the Fraunhofer-Gesellschaft and implemented by the Research Fab Microelectronics Germany (FMD), a cooperation of the Fraunhofer Group for Microelectronics with the Leibniz institutes IHP and FBH.
Fraunhofer IIS is a key stakeholder in the Research Fab Microelectronics Germany (FMD) and the APECS pilot line, contributing its world-leading expertise in chiplet architectures, heterogeneous integration, and advanced packaging.
