Adaptivity is an essential property for the connected world of tomorrow. Intelligent components can independently recognize changes in their environment or within themselves, assess them and take appropriate action. As business partner, Fraunhofer IIS/EAS develops key technologies for such adaptive systems and offers innovative as well as robust solutions.



AI Innovation Days 2020: 25 speakers, 20 AI use cases, and a hybrid event concept

This year’s edition of the AI Innovation Days, hosted by Fraunhofer IIS/EAS, took place on September 16 and 17. The participation of high-caliber speakers from industry, politics, and research, in conjunction with extensive opportunities for dialogue, made for an exciting discussion forum on artificial intelligence. The first topic on the agenda was »Saxony and AI – pioneer or bystander?«


Webinar Wednesday at Fraunhofer IIS/EAS

Encouraged by the success of our Webinar Wednesday series this year, we have decided to continue it after the summer break, starting in October. The complete new program for our free technology webinars will be online from the middle of October.



Upcoming Event

IWLPC from October 13 to 15, 2020

At the International Wafer-Level Packaging Conference (IWLPC) in San Jose, California, experts from the semiconductor industry will discuss a variety of different aspects about the following topics: wafer level, 3D, TSV and MEMS component packaging and its manufacturing.

Fraunhofer Institute for Integrated Circuits IIS

Division Engineering of Adaptive Systems EAS

Zeunerstrasse 38
01069 Dresden
Phone +49 351 4640-701

From our work

System Packaging

With the increasing scope of functionality of electronic systems and advances in miniaturization, traditional chip designs are coming ever closer to their technological and economic limits. That is why novel integration concepts are needed.



Among others, our offers will help you profit from:

  • Higher system performance combined with low energy consumption
  • Maximum miniaturization of complex systems
  • Cost savings compared with comparable ASIC implementation
  • Reduced risk in the introduction of new packaging solutions

Research Fab Microelectronics

Fraunhofer IIS/EAS is participant of the Research Fab Microelectronics Germany.


Logo Research Fab Microelectronics