To make electronic components more reliable, and therefore more sustainable, the core components of chips (the transistors) are tested using complex tests and computer models at Fraunhofer IIS. Researchers at the Engineering of Adaptive Systems division specialize in testing new transistor types and technologies prior to their large-scale industrial deployment. They investigate the various aging and degradation mechanisms in the components.
The test laboratory is equipped with two wafer probers and other measuring equipment for testing transistor properties and reliability. To this end, the transistors undergo stress testing for many hours. They are cooled to minus 40 degrees Celsius, heated to 200 degrees, and exposed to high electrical voltages.
Thanks to the Dresden laboratory's cutting-edge technology, measurements between stress phases take just five microseconds. This makes it significantly faster than comparable test methods, with only minimal impact on test-related aging. Another unique feature of these tests is that they allow stress to be applied to the transistor in a manner that mimics its subsequent real-life use. For example, alternating stress is applied that increases and decreases at a specific rate.
Reliability testing of integrated transistors at the wafer level (WLR) and test objects at the package level.
Semiconductor manufacturers and integrated circuit designers seeking to test new transistor technologies, research institutions, cooperation partners
Users can electrically characterize integrated components under various voltage and temperature conditions in accordance with general industry standards (JEDEC) and specific customer requirements to achieve technology qualification according to AEC-Q100, for example.
One special feature is that fast BTI measurements can be performed in the laboratory to analyze degradation and relaxation during the aging process, i.e., bias temperature instability (BTI).
The reliability of ICs and other devices is essential for safety-critical and long-lasting applications. To investigate the influence of various wear mechanisms, we characterize semiconductor structures according to industry standards and customer-specific requirements while focusing on reliability. We design appropriate experiments, conduct them, and analyze the data. We also offer additional measurements to calibrate degradation models or evaluate specific technological capabilities.
Labtour