Fraunhofer Institute for Integrated Circuits IIS, Division Engineering of Adaptive Systems
Fraunhofer Institute for Integrated Circuits IIS, Division Engineering of Adaptive Systems

Project APECS

The APECS pilot line (Advanced Packaging and Heterogeneous Integration for Electronic Components and Systems) is a core project within the framework of the European Chips Act. It aims to strengthen the European semiconductor industry through innovative technologies and a robust infrastructure. Given the global dependence on international supply chains, APECS is crucial for Europe’s technological sovereignty and competitiveness in the digital age.

Project Objectives

The APECS pilot line creates a platform accessible across Europe for advanced chiplet technologies and heterogeneous integration. The aim is to transfer innovations from research and development directly into industrial applications, to strengthen the competitiveness of the European semiconductor industry, and to provide companies of all sizes with access to state-of-the-art microelectronics. APECS thus plays a key role in Europe’s technological sovereignty and security of supply.

Finding the solution

To create new functionalities and seamless design-to-production capability, APECS has opted for system technology co-optimization (STCO). This methodology includes the development of designs for 2.5D/3D integration, the optimization of chiplet and interposer manufacturing processes, and the use of comprehensive test and reliability methods. The aim is to transfer innovations in chiplet technology to industrial processes in a scalable manner and to cover the entire development chain — from the design of new chiplet components to scalable manufacturing processes. This is intended to provide both large industrial companies as well as SMEs and startups with easy access to cutting-edge technologies, while also creating secure, resilient semiconductor supply chains in Europe.

Outlook

Ultimately, the APECS pilot line is to be established as a European center for chiplet research and production. Its advanced technologies and processes can be transferred to other semiconductor applications, strengthening Europe’s strategic position in global microelectronics and accelerating technological innovation over the long term.

The research project is coordinated by the Fraunhofer-Gesellschaft and implemented by the Research Fab Microelectronics Germany (FMD). Fraunhofer IIS in Dresden receives funding for its APECS activities from the Chips Joint Undertaking, the German Federal Ministry of Education and Research (BMBF) and the Free State of Saxony. A total of 10 partners from eight countries across Europe are participating in the overall project.

Close cooperation between research, the public sector and industry ensures that the project is implemented in a practical manner and has a lasting impact.

Funding:

APECS is co-funded by the Chips Joint Undertaking and national funding authorities of Austria, Belgium, Finland, France, Germany, Greece, Portugal, Spain, through the Chips for Europe Initiative.

Thanks to substantial funding from the German Federal Ministry of Research, Technology and Space (BMFTR) and the federal states of Saxony, Berlin, Bavaria, Schleswig-Holstein, Baden-Württemberg, North Rhine-Westphalia, Brandenburg, and Saxony-Anhalt, it will be possible to further expand the R&D infrastructure in the coming years within the framework of the APECS pilot line. This project is funded by the European Union's Regional Development Fund (EFRE).