Customer reference for a reduction of the verification workload

For more than 20 years, Elmos Semiconductor AG has produced ultrasound ICs for applications in the automotive and other fields of industry. Meanwhile, the demands on circuits and their complexity have continued to rise. The verification of ICs therefore now takes up a considerable portion of the company’s development time. At the same time, it has become indispensable to verify the functional reliability of even the smallest units of a system in order to meet the highest reliability requirements in the future as well.

Fraunhofer IIS/EAS therefore worked with the Elmos subsidiary DMOS to develop an especially efficient verification process. The goal was to reduce the manual labor in this process as far as possible. The approach was based on current methods such as UVM (Universal Verification Methodology), which optimally support a structured process. On this basis, DMOS and the division developed a verification plan and a set of test scenarios based on this plan which led to a higher test coverage than before. Special attention was paid to the automated generation of reliable conclusions concerning the absence of errors and test coverage. These were obtained very efficiently via a parameterizable procedure for analysis of the simulation data. The designers are also aided by a new graphical visualization of the verification results. With these measures, internal processes can be optimized and particularly challenging customer requirements can be met at the same time.

One future focus of the collaboration lies on creating approaches that should enable extensive reuse of the verification environment for various design projects. To this end, Fraunhofer IIS/EAS will develop verification IPs for a predefined environment. The goal is to achieve a further considerable decrease in workload, especially for subsequent projects.