Newsletter 01/2022

New products demonstrate that even large and complex chiplet structures can be made reliable and efficient. Our chiplet expert Andy Heinig presents current developments and trends, for example when it comes to reusing particular circuits.

Chiplet architecture by Fraunhofer IIS/EAS

Recent weeks have seen a number of interesting developments in the area of chiplets. An increasing number of products based on chiplets have been brought to market, especially in the processors segment. For example, Apple and AMD now have processors with chiplets on the market and under production in high volumes. On one hand, this means that sufficient production capacity has now been built up on the manufacturer side. Previously, the production capacities for such volumes were lacking along the entire chain. On the other hand, this now confirms that even large and complex chiplet structures can be designed reliably and efficiently. However, applications are so far limited to those with a large number of units.

The advantage of systems consisting of many units is that the chiplet interface does not have to be standardized since large unit volumes are amenable to one-off development projects. This allows for highly individual solutions to be found that are tailored to the specific requirements. Systems with a large number of units also offer the advantage that all components are designed by a single manufacturer, and the chiplet interfaces can also be designed by the same manufacturer. In addition to the ease of adaptability, this also saves time by eliminating the need for laborious standardization. This is exactly the path taken by the two processor makers – Apple and AMD. The necessary ecosystem, consisting of interposer manufacturers as well as chiplet assembly on the interposers, is simpler to organize for large unit volumes since it is usually handled entirely by the chip maker. In turn, this ensures that the individual circuits are compatible from assembly to interposer. The use of chiplets in such high-volume applications has been driven primarily by performance and the smaller circuit area.

On the other side, however, it is clear that chiplets have yet to be introduced for product groups with smaller unit volumes. This is due, above all, to the lack of an established ecosystem for manufacturing. As a result, there is no guarantee that circuits from different manufacturers can actually be connected to the interposer and that no problems will arise during assembly. Additional standardization work is therefore required here. In the area of low unit volumes, it has not yet been decided whether the more expensive silicon interposers are the right choice or whether interposers made of organic material might be better.

The issue of reusing individual circuits of the chiplets for different applications also plays a large role when it comes to these product groups. Only such reuse makes it worthwhile to develop circuits in small technology nodes. In applications with low unit volumes, the use of chiplets is therefore driven most by the wish to reuse various sub-assemblies.  However, this requires a standard interface between the circuits. Currently, other developments can be observed with regard to development of a standard interface. For instance, the Bunch-of-Wire (BoW), the Universal Chiplet Interconnect Express (UCIe), and other candidates have already been developed to the point of being registered as standards. That being said, the development of various standards has led once again to a highly differentiated market, which complicates the development of the corresponding interface IPs on one hand and the production of circuits with the chiplet interface on the other since it remains unclear which standard should be preferred. In order for chiplets to be successfully introduced in this segment, it is therefore essential for a global standard to be agreed upon that satisfies the various requirements of the different applications.