Integration of Electronic Systems

There are several technological variants regarding the placement of multiple dies as a system-in-package up to stacking them as 3D systems. Short conductor lengths in the system increase performance and reduce energy consumption. Die stacking also allows the integration of different components such as processors, sensors and wireless interfaces in a block. The path of the planar integrated circuit to the third dimension is tracked by the world's leading manufacturers in order to achieve the ambitious goals according to "More than Moore" in terms of features, density and cost.

Particular challenges in the design are the mastery of complexity, the optimal utilization of the additional degrees of freedom and consideration of the close thermal, mechanical and electrical coupling in the stacked system.

In this regard we develop tools, models, simulation methods and optimization techniques used to implement innovative solutions. To do this, we combine state-of-the-art tools for in-the-loop optimization across several physical domains and in all 3 dimensions and combine the extraordinary details of FEM models with the simulation speed of compact models.

Variety of Technologies for Integration of Multiple Dies Within a Package

system-in-package

  • Placement of different IC at package substrate
  • Wire bond or flip-chip connection
  • Integration of passive devices

interposer-based integration

  • Higher integration level using thinned silicon interposers
  • Signal routing between dies within the metal layers of interposers and its TSV

direct stacking

  • Highest integration density
  • Extremely short interconnects
  • Requires die and stack co-design