Modern business models in the world of integrated circuit (IC) design offer excellent scalability with a high degree of automation and reusability, as impressively demonstrated in the area of digital design. Analog design, by contrast, still suffers from a very low level of automation, resulting in long development times and relatively low reusability, coupled with high design risk and development costs. Such challenges are increasingly aggravated by growing system complexity and ever-smaller technology nodes.
Fraunhofer IIS/EAS therefore supports you with solutions to enable greater automation in analog design. Among other things, we’ve developed an approach using Intelligent IP (IIP) that automates typical analog basic circuits in a user-friendly manner, thereby speeding up the design process. We also automate design steps on an individual basis in line with customer requests.
Our portfolio of services for automated analog design includes the development of software and scripts for recurring and/or error-prone design steps, in particular for the Cadence Virtuoso® design environment. In addition, we develop application-oriented and automated design flows, from schematic entry to simulation and layout automation. Our services are applicable to technologies ranging from 350 nm to 22 nm, as well as FinFET technologies from various foundries. We also offer cross-project automation, design porting, and design migration. When it comes to selecting suitable automation methods and design tools, our focus is on cost, benefit, and usability for our customers.